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document number: mpc17550 rev. 2.0, 7/2006 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2006. all rights reserved. quad h-bridge micromotor driver with dc/dc boost converter the 17550 is a monolithic quad h-bridge power ic ideal for portable electronic applications containing ti ny bipolar stepper motors and/or brush dc-motors powered by two- to-four cell nicd/nimh batteries. the 17550 operates from 2.5 v to 5.5 v, with independent control of each h-bridge via parallel 3.0 v or 5.0 v logic-compatible i/o. the device features an on-board dc / dc boost converter that allows motor operation all the way down to 1.6 v (the boost converter supplies the gate-drive voltage for each of the four independent h-bridge output stages). each output bridge has its own gate-drive and logic circuitry with built-in shoot-throug h current protection. the 17550 has four operating modes : forward, reverse, brake, and tri-stated (high impedance). the 17550 has a low total r ds(on) of 1.2 ? max @ 25c. in addition, it can be set into a very low current- drain standby mode. the h-bridge outputs can be independently pwm?ed at up to 200 khz for speed/torque and current control. the 17550 can efficiently drive many types of micromotors owing to its low output resistance and high output slew rates. features ?low total r ds(on) 0.7 ? (typ), 1.2 ? (max) @ 25c ? output current 700 ma (continuous per output) ? shoot-through current protection circuit ? pwm control input frequency up to 200 khz ? built-in dc / dc boost converter ? low power consumption standby mode ? undervoltage detection and shutdown circuit ? pb-free packaging designated by suffix code ev figure 1. 17550 simplified application diagram h-bridge motor driver ev suffix (pb-free) 98asa10591d 36-terminal vmfp 17550 ordering information device temperature range (t a ) package mpc17550ev/el -10c to 60c 36 vmfp vdd v m v dd indr indf hbdr hbdf incr incf hbcr hbcf inbr inbf inar inaf hbar hbaf hbbr hbbf psb vg lx vm gnd mcu oe 17550
analog integrated circuit device data 2 freescale semiconductor 17550 internal block diagram internal block diagram figure 2. 17550 simplifi ed internal block diagram v dd vg gate driver dc/dc converter hba vdd psb agnd oe inaf inar inbf inbr incf indf indr gnd incr hbdr hbdf vmd hbcr hbcf vmc pgnd hbbr hbbf vmb pgnd hbar hbaf vma lx vg hbb pgnd hbc pgnd hbd v dd v dd and level shifter control logic v dd
analog integrated circuit device data freescale semiconductor 3 17550 terminal connections terminal connections figure 3. 17550 terminal connections table 1. terminal function description terminal terminal name formal name definition 1 agnd analog ground analog and logic signal ground reference terminal. 2 nc no connect no connection to this terminal. 3 psb power standby power standby mode control terminal. 4 oe output enable logic output enable control of h-bridges (low = true). 5 , 9 vma motor drive power supply a power supply voltage connection for motor ?a? (top of hba). 6 hbaf hba forward output forward output of h-bridge a. 8 hbar hba reverse output reverse output of h-bridge a. 10, 14 vmb motor drive power supply b power supply voltage connection for motor ?b? (top of hbb). 11 hbbr hbb reverse output reverse output of h-bridge b. 7, 12, 25, 30 pgnd power ground power ground connection. 13 hbbf hbb forward output forward output of h-bridge b. 15 inar input control hba reverse control signal input for h-bridge a reverse. 16 inaf input control hba forward control signal input for h-bridge a forward. 17 inbf input control hbb forward control signal input for h-bridge b forward. 18 inbr input control hbb reverse control signal input for h-bridge b reverse. 19 indr input control hbd reverse control signal input for h-bridge d reverse. 20 indf input control hbd forward control signal input for h-bridge d forward. 21 incf input control hbc forward control signal input for h-bridge c forward. 22 incr input control hbc reverse control signal input for h-bridge c reverse. 23, 27 vmd motor drive power supply d power supply voltage connection for motor ?d? (top of hbd). 24 hbdf hbd forward output forward output of h-bridge d. 26 hbdr hbd reverse output reverse output of h-bridge d. 28, 32 vmc motor drive power supply c power supply voltage connection for motor ?c? (top of hbc). 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 agnd nc psb oe vma hbaf pgnd hbar vma vmb hbbr pgnd hbbf vmb inar inaf inbf inbr vg vdd lx gnd vmc hbcf pgnd hbcr vmc vmd hbdr pgnd hbdf vmd incr incf indf indr
analog integrated circuit device data 4 freescale semiconductor 17550 terminal connections 29 hbcr hbc reverse output reverse output of h-bridge c. 31 hbcf hcb forward output forward output of h-bridge c. 33 gnd ground control circuit ground terminal for dc/dc circuit ground. 34 lx dc/ dc converter switching transistor output open-drain output of the inter nal dc/ dc converter circuit. 35 vdd logic supply control circuit power supply terminal. 36 vg gate-driver circuit power supply input terminal for the gate-drive voltage. table 1. terminal function description (continued) terminal terminal name formal name definition
analog integrated circuit device data freescale semiconductor 5 17550 electrical connections maximum ratings electrical connections maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise noted . exceeding the ratings may cause a malfunction or permanent damage to the device. rating symbol value unit motor supply voltage v m -0.5 to 9.0 v gate-driver circuit power supply voltage v g v dd - 0.5 to 14 v logic supply voltage v dd -0.5 to 6.0 v signal input voltage (1) v in -0.5 to v dd + 0.5 v driver output current continuous (2) peak (3) i o i opk 0.7 2.0 a esd voltage (4) human body model machine model v esd1 v esd2 2000 100 v storage temperature range t stg -65 to 150 c operating ambient temperature t a -10 to 60 c operating junction temperature t j -10 to 150 c thermal resistance (5) r ja tbd c/w power dissipation (6) p d 1500 mw soldering temperature (7) t solder 260 c notes 1. v in is the voltage level applied to any input terminal. 2. i o is measured as the load current flowing through the h-bridge. 3. t a = 25 c, pulse width < 10 ms at intervals > 0.2 seconds. 4. esd1 testing is performed in accor dance with the human body model (c zap = 100 pf, r zap = 1500 ? ), esd2 testing is performed in accordance with the machine model (czap = 200 pf, rzap = 0 ? ). 5. mounted on 37 x 50 cu area (1.6 mm fr-4 pcb). 6. maximum at t a = 25 c. 7. soldering temperature limit is for 10 seconds maximum duratio n. not designed for immersion sold ering. exceeding these limits may cause malfunction or permanent damage to the device.
analog integrated circuit device data 6 freescale semiconductor 17550 electrical connections static electrical characteristics static electrical characteristics table 3. static electrical characteristics characteristics noted under conditions t a = 25 c, v dd = 3.0 v, v m = 2.5 v, gnd = 0 v, f in = 176 khz unless otherwise noted. typical values noted reflect the approximate parameter means at t a = 25 c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit power motor supply voltage v m 1.6 2.5 5.5 v logic supply voltage v dd 2.5 3.0 5.5 v standby power supply current (8) motor supply standby current logic supply standby current i v mstby i v ddstby ? ? ? ? 1.0 1.0 a logic supply current i v dd ? 0.3 1.0 ma gate driver circuit power supply current (9) standby (psb = ?l?) no signal operating input signal operating (10) i ddc0 i ddcn i ddc ? ? ? ? 1.0 19 1.0 3.0 25 a a ma driver output on resistance (11) r ds(on) ? 0.7 1.2 ? gate drive gate driver circuit power supply voltage (12) v g 10 11.5 13 v control logic logic input voltage (13) v in 0 ? v dd v logic input (f, r, psb, oe ) high-level input voltage low-level input voltage high-level input current low-level input current v ih v il i ih i il v dd x 0.7 ? ? -1.0 ? ? ? ? ? v dd x 0.3 1.0 ? v v a a notes 8. applies individually to each h-bridge. 9. average inductor current for dc/ dc converter (connected between v d d and lx [l = 1.0 mh, c = 2.2 f]). 10. full drive (input signal to all input control terminals). 11. the total h-bridge on resistance when v g is 11.5 v. 12. when voltage is supplied exte rnally without built-in dc/ dc. 13. v in is the voltage level applied to any input.
analog integrated circuit device data freescale semiconductor 7 17550 electrical connections dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electrical characteristics characteristics noted under conditions t a = 25 c, v dd = 3.0 v, v m = 2.5 v, gnd = 0 v, f in = 176 khz unless otherwise noted. typical values noted reflect the approximate parameter means at t a = 25 c under nominal conditions unless otherwise noted. characteristic symbol min typ max unit input pulse input frequency (14) f in ? ? 200 khz internal oscillator frequency f osc ? 100 200 khz output gate driver circuit power supply wake-up time t vgon ? 10 20 ms propagation delay time turn-on time turn-off time t plh t phl ? ? 0.2 0.2 1.0 1.0 s notes 14. f in is the signal frequency applied to an input terminal (f, r).
analog integrated circuit device data 8 freescale semiconductor 17550 electrical connections timing diagrams timing diagrams figure 4. dc/dc converter output waveform figure 5. h-bridge output waveform t vgon psb v g 2.1 v v il v ih 10 v t plh fo, ro 50% t phl f, r , 50% table 5. truth table psb, oe ina / inb / inc / ind hba / hbb / hbc / hbc psb oe in*f in*r hb*f hb*r h l l l l l h l l h l h h l h l h l h l h h z z h h x x z z l x x x z z h = high. l = low. z = high impedance. x = don?t care. * = a, b, c, or d.
analog integrated circuit device data freescale semiconductor 9 17550 functional description introduction functional description introduction the 17550 is a monolithic quad h-bridge ideal for portable electronic applications contai ning multiple bipolar stepper motors and / or brush dc motors. the device features an on- board dc / dc converter to provide gate-drive voltages, as well as level-shifting circuitry. the control logic translates the input signals to the gate-driver circuitry while providing cross- conduction suppression. the 17550 has four operating modes: forward, reverse, brake, and tri-stated (high impedance). the mosfets comprising the output bridge have a total source + sink r ds(on) 1.2 ? . the 17550 can simultaneously drive four brush dc motors or two bipolar stepper motors. the drivers are designed to be pwm?ed at frequencies up to 200 khz. functional terminal description logic supply (vdd) the vdd terminal carries the logic supply voltage and current into the logic sections of the ic. v dd has an undervoltage threshold. if the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. when the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input control terminals. control signal input for h-bridge, f=forward, r= reverse (inaf, inar, inbf, inbr, incf, incr, indf, indr) these logic input control terminals control each h-bridge output; e.g., in*f logic high = hb*f high; likewise, in*r logic high = hb*r high. however, if both ?f? and ?r? inputs are taken high, the associated bridge?s outputs are both tri- stated (refer to table 5, truth table , page 8 ). output enable ( oe) oe terminal is a low = true enable input. when oe = high, all h-bridge out puts are tri-stated (high impedance) regardless of logic inputs states. output of h-bridge, r=reverse, f=forward (hbaf, hbar, hbbf, hbbr, hbcf, hbcr, hbdf, hbdr) these terminals provide connect ion to the outputs of each of the internal h-bridges (see figure 2, 17550 simplified internal block diagram , page 2 ). power supply voltage connection for motors a, b, c, d (vma, vmb, vmc, vmd) the vm terminals carry the main supply voltage and current into the power sections of the 17550. this supply then becomes controlled and/or modulated by the 17550 as it delivers the power to the loads attached between the h-bridge output terminals. all vm terminals must be connected together on t he printed circuit board. dc/ dc converter switching transistor output (lx) the lx terminal is the open-drain output of the internal dc / dc converter circuit. it is the junction for the external inductor and the anode of the external schottky diode. gate-driver circui t power supply (vg) the vg terminal is the input terminal for the gate-drive voltage. it can be supplied from the built-in dc / dc converter or from an external source. ground terminals (gnd, agnd, pgnd) all ground terminals must be tied together on the pcb. power standby mode control (psb) the psb input controls the functioning of power output stages (the h-bridges). when this input signal turns low, the output stages and internal dc/dc converter which makes gate voltage are disabled and all the outputs are opened (high impedance). when this input signal turns high, the output stages and internal dc/dc converter are enabled and the h-bridges operate normally.
analog integrated circuit device data 10 freescale semiconductor 17550 typical applications introduction typical applications introduction the 17550's built-in dc / dc converter must be connected to an external inductor, rectif ier, and filter capacitor. this step-up converter generates the gate-drive voltage, v g , required by the internal gate driv er circuits. although there is some latitude in selecting the values for the external component, care must be taken that v g does not exceed 14 v. additionally, too low an inductance will cause large instantaneous switching curr ents, which may damage the device. important do not use an inductance lower than 330 h. to attain high-efficiency oper ation, the rectifier should be a schottky diode, and t he filter capacitor s hould be of the low equivalent series resistance (esr) type. attention should be paid to proper switch mode power supply pcb layout practice. some experimentation may be required to determine optimal external component values. the recommended starting values are l = 1.0 mh, c = 2.2 f. the dc / dc converter includes its own internal oscillator and does not require an external clock input. typical application two typical application schematics are shown in figure 6 . and figure 7 . figure 6. typical 17550 application - controlling stepper motors 2.2 f l = 1.0 mh 10 f vdd vm gnd psb oe inar inaf inbf inbr incr incf indf indr vg lx hbaf hbar hbbr hbbf hbcf hbcr hbdr hbdf mcu n s n s 17550 v m = 2.5 v v dd = 3.0 v 47 f
analog integrated circuit device data freescale semiconductor 11 17550 typical applications introduction figure 7. typical 17550 application - no internal dc-dc used vdd vm gnd psb oe inar inaf inbf inbr incr incf indf indr vg lx hbaf hbar hbbr hbbf hbcf hbcr hbdr hbdf mcu n s n s 17550 v m = 2.5 v v dd = 3.0 v 47 f vg 11.5v
analog integrated circuit device data 12 freescale semiconductor 17550 typical applications introduction cemf snubbing techniques care must be taken to protect the ic from potentially damaging cemf spikes induced when commuting currents in inductive loads. typical practice is to provide snubbing of voltage transients by placing a capacitor or zener at the motor supply voltage terminal (vm) (see figure 8 ). figure 8. cemf snubbing techniques 175xx 5.0 v 5.0 v gnd c1l c1h c2l c2h cres vm vdd out out 175xx 5.0 v 5.0 v gnd c1l c1h c2l c2h cres vm vdd out out
analog integrated circuit device data freescale semiconductor 13 17550 packaging package dimensions packaging package dimensions important: for the most current revi sion of the package, visit www.freescale.com and perform a keyword search on the 98a number listed below. date 10/01/03 case 1522-01 issue o notes: 1. 2. 3. 4. 5. all dimensions are in millimeters. dimensioning and tolerancing per asme y14.5m, 1994. dimensions do not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.5 mm per end. dimension does not include interlead flash or protrusion. interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.5 mm per side. dimensions are determined at the outmost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. terminal numbers are shown for refernce only. view y section r-r view k view rotated 90? cw jpn ai b a c 5.40 5.20 1.90 1.70 4x r0.40?.10 14??? 12??? 12.70 12.50 1.35?.10 1.30?.10 2x r0.15?.10 1.20?.10 1.20?.10 view y view k 3 5 4 3 4 36 1 18 19 (jpn)/cavity #(a1) bottom side 2x r0.15?.10 c 0.10 36x 0.27 0.37 36x 0.13 a cb m seating plane plating base metal 0.37 0.27 0.27 0.15 0.13 a cb m (0.30) (0.20) 0.325 0.65 0.25 r r 1.90 1.70 0.20 0.00 12??? 0?- 8? 14??? 0.69?.20 0.60?.20 guage plane 4 34x ev (pb-free) suffix 36-lead vmfp plastic package case 1522-01 issue o
analog integrated circuit device data 14 freescale semiconductor 17550 revision history revision history revision date description of changes 2.0 7/2006 ? converted to freescale format and updated to the prevailing form and style ? added typical application for non dc/dc use ? added rohs compliance
mpc17550 rev. 2.0 7/2006 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2006. all rights reserved. how to reach us: home page: www.freescale.com e-mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

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